PhD students

The following PhD students are currently working under my supervision:

The following PhD students finished their studies under my supervision:

  • Filipa Duarte (finished 2008) - A Cache-based Hardware Accelerator for Memory Data Movements (PDF)

The following PhD students were partially guided by me:

  • Christopher Kachris (partial guidance, finished 2007) - Reconfigurable Network Processing Platforms (PDF)
  • Julio Carlos Balzano de Mattos (sandwich student UFRGS, 1 year) - The MOLEN Femto-Java Engine (PDF)

MSc students

Students looking to do a MSc thesis project with me can take a look at the following list.

The following MSc students are currently working on their thesis projects under my supervision:

  • Siebe Krijgsman - (topic) A Partial-Reconfigurable Audio Generation and Manipulation Application
  • Martin Ramcharan - (topic) Image Spam Detection
  • Roel Seedorf - (topic) Fingerprint Scanning Application on Reconfigurable Hardware
  • Joaquin Marcos Mosquera Rodriguez (Erasmus student)
  • Gloria Garcia Dosil (Erasmus student)

The following MSc students finished their thesis projects under my supervision: (1997's is my own :-))


to be added soon


to be added soon


  1. A.A.C. Brandon, General Purpose Computing with Reconfigurable Acceleration, Delft, November 2010, MSc Thesis (BibTeX)


  1. T. van As, ρ-VEX: A Reconfigurable and Extensible VLIW Processor, September 2008, MSc Thesis (BibTeX)
  2. M. Moumen, QoS Support in Delivering Video data over the Internet, May 2008, MSc Thesis (BibTeX)


  1. S.D. Breijer, Memory organization of the Molen prototype, August 2007, CE-MS-2007-06, MSc Thesis (BibTeX)
  2. S.J. Raaijmakers, Run-Time Partial Reconfiguration on the Virtex-II Pro, July 2007, MSc Thesis (BibTeX)
  3. R.R Abrahams, FPGA Implementation and Simulation of Hybrid Type-III ARQ for UMTS, July 2007, MSc Thesis (BibTeX)
  4. B. Regelink, Modular Embedded Platform Design for Physical Asset Management, December 2007, MSc Thesis (BibTeX)
  5. S Shao, Video-Over IP implementation on a Field-Programmable Gate Array, October 2007, MSc Thesis (BibTeX)


  1. G. Savir, Scalable and Reconfigurable Digital Front-End for SDR Wideband Channelizer, September 2006, MSc Thesis (BibTeX)
  2. E.P.M. van Diggele, Translation of SystemC to Synthezisable VHDL, July 2006, MSc Thesis (BibTeX)
  3. M. van den Braak, Voice over IP implementation on a Field-Programmable Gate Array, June 2006, MSc Thesis (BibTeX)
  4. D. Ludovici, Performance Analysis of RR and FQ Algorithms in Reconfigurable Routers, pp. 131, Delft, The Netherlands, December 2006, MSc Thesis (BibTeX)


  1. Y Zhao, Benchmarking and Profiling the RSVP Protocol, August 2005, MSc Thesis (BibTeX)


  1. J. Yin, Session Initiation Protocol Benchmark Suite, Delft University of technology, October 2004, MSc Thesis (BibTeX)


  1. W. Lu, Designing TCP/IP Functions In FPGAs, Delft, The Netherlands, August 2003, MSc Thesis (BibTeX)
  2. A. Snirpunas, Mapping of Motion Estimation on a VLIW Processor Template, Delft, The Netherlands, July 2003, MSc Thesis (BibTeX)
  3. Y. Wu, Benchmarking Real-Time Network Processing, Delft, The Netherlands, July 2003, MSc Thesis (BibTeX)
  4. G. A. Fossung, Performance Evaluation of Adders on FPGAs, June 2003, MSc Thesis (BibTeX)


  1. G. Luo, Synthetic Microcode Benchmark Generation, September 2002, MSc Thesis (BibTeX)


  1. S. Wong, Simulation of the Clustered Torus, April 1997, MSc Thesis (BibTeX
Stephan Wong
Stephan Wong (Associate Professor)