George Razvan Voicu

PhD student at the Computer Engineering Group of the Faculty of Engineering, Mathematics and Computer Science (EEMCS/EWI), Delft University of Technology.

Research

My research focuses on designing novel architectures for 3D Stacked integrated circuits, under the supervision of Sorin Cotofana. My research interests include Computer and Microprocessor Architectures, Computer Arithmetic, Multi-core and System-On-Chip Architectures, and Low-power Architectures.

Projects

3DIM3 (3D-TSV Integration for Multimedia and Mobile applications) aims at providing novel system architectures and design methodologies tailored tor the specific challenges and opportunities provided by the emerging 3D TSV integration technology. Within this large European project the CE lab research efforts are mainly focused on the definition and evaluation of 3D System Architectures. In this line of reasoning we address the following topics: (a) 3D multiprocessor architecture, (b) 3D memory hierarchy, (c) 3D test architectures and methodologies, (d) 3D dependable computing, and (e) 3D early performance evaluation and design space exploration tools.

Publications George Razvan Voicu

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    2017

  1. M. Lefter, G.R. Voicu, T. Marconi, V. Savin, S.D. Cotofana, LDPC-Based Adaptive Multi-Error Correction for 3D Memories (to appear: September 2017), 35th IEEE International Conference on Computer Design (ICCD 2017), 5-8 November 2017, Boston, USA [Conference Paper]
  2. M. Lefter, T. Marconi, G.R. Voicu, S.D. Cotofana, Low Cost Multi-Error Correction for 3D Polyhedral Memories1640_low_cost_multierror_correction_for_3d_polyhedral_memories.pdf (July 2017), IEEE/ACM International Symposium on Nanoscale Architectures (NANOARCH 2017), 25-26 July 2017, Newporrt, USA [Conference Paper]
  3. 2016

  4. G.R. Voicu, S.D. Cotofana, High-performance, Cost-effective 3D Stacked Wide-Operand Adders1545_highperformance_costeffective_3d_stacked_wideoperand_ad.pdf (August 2016), IEEE Transactions on Emerging Topics in Computing, DOI: 10.1109/TETC.2016.2598290 [Journal Paper]
  5. M. Enachescu, M. Lefter, G.R. Voicu, S.D. Cotofana, Low-Leakage 3D Stacked Hybrid NEMFET-CMOS Dual Port Memory (July 2016), IEEE Transactions on Emerging Topics in Computing, DOI: 10.1109/TETC.2016.2588725 [Journal Paper]
  6. 2015

  7. M. Lefter, G.R. Voicu, S.D. Cotofana, A Shared Polyhedral Cache for 3D Wide-I/O Multi-Core Computing Platforms1478_a_shared_polyhedral_cache_for_3d_wideio_multicore_comput.pdf (May 2015), IEEE International Symposium on Circuits and Systems (ISCAS 2015), 24-27 May 2015, Lisbon, Portugal [Conference Paper]
  8. 2014

  9. M. Lefter, M. Enachescu, G.R. Voicu, S.D. Cotofana, Energy Effective 3D Stacked Hybrid NEMFET-CMOS Caches1582_energy_effective_3d_stacked_hybrid_nemfetcmos_caches.pdf (July 2014), 10th ACM/IEEE International Symposium on Nanoscale Architectures (NANOARCH 2014), 8-10 July 2014, Paris, France [Conference Paper]
  10. 2013

  11. G.R. Voicu, S.D. Cotofana, Towards Heterogenous 3D-Stacked Reliable Computing with von Neumann Multiplexing1369_towards_heterogenous_3dstacked_reliable_computing_with_von.pdf (July 2013), 9th ACM/IEEE International Symposium on Nanoscale Architectures (NANOARCH 2013), July 15-17, 2013, New York City, USA [Conference Paper]
  12. S. M. Alavi, G.R. Voicu, R. B. Staszewski, L. C. de Vreede, J.R. Long, A 2x13-bit All-Digital I/Q RF-DAC in 65-nm CMOS (June 2013), IEEE Radio Frequency Integrated Circuits Symposium (RFIC 2013), 2-4 June 2013, Seattle, USA, Best Student Paper Award - 2nd Place [Conference Proceedings]
  13. G.R. Voicu, M. Lefter, M. Enachescu, S.D. Cotofana, 3D Stacked Wide-Operand Adders: A Case Study1586_3d_stacked_wideoperand_adders_a_case_study.pdf (June 2013), 24th IEEE International Conference on Application-Specific Systems, Architectures and Processors (ASAP 2013), 5-7 June 2013, Washington D.C., USA [Conference Paper]
  14. M. Lefter, G.R. Voicu, M. Taouil, M. Enachescu, S. Hamdioui, S.D. Cotofana, Is TSV-based 3D Integration Suitable for Inter-die Memory Repair?1328_is_tsvbased_3d_integration_suitable_for_interdie_memory_r.pdf (March 2013), Design, Automation & Test in Europe Conference & Exhibition (DATE 2013), 18-22 March 2013, Grenoble, France [Conference Paper]
  15. 2012

  16. G.R. Voicu, M. Enachescu, S.D. Cotofana, A 3D Stacked High Performance Scalable Architecture for 3D Fourier Transform1592_a_3d_stacked_high_performance_scalable_architecture_for_3d.pdf (September 2012), 30th IEEE International Conference on Computer Design (ICCD 2012), 30 September - 3 October 2012, Montreal, Canada [Conference Paper]
  17. S. Safiruddin, M. Lefter, D. Borodin, G.R. Voicu, S.D. Cotofana, Zero-Performance-Overhead Online Fault Detection and Diagnosis in 3D Stacked Integrated Circuits1308_zeroperformanceoverhead_online_fault_detection_and_diagno.pdf (July 2012), IEEE/ACM International Symposium on Nanoscale Architectures (NANOARCH 2012), 4-6 July 2012, Amsterdam, The Netherlands [Conference Paper]
  18. M. Enachescu, G.R. Voicu, S.D. Cotofana, Is the Road Towards "Zero-Energy" Paved with NEMFET-based Power Management?141_is_the_road_towards_zeroenergy_paved_with_nemfetbased_po.pdf (May 2012), IEEE International Symposium on Circuits and Systems (ISCAS 2012), 20-23 May 2012, Seoul, Korea, Finalist for Best Paper Award for PhD Students [Conference Paper]
  19. S. Safiruddin, D. Borodin, M. Lefter, G.R. Voicu, S.D. Cotofana, Is 3D Integration The Way to Future Dependable Computing Platforms?1307_is_3d_integration_the_way_to_future_dependable_computing_pl.pdf (May 2012), 13th International Conference on Optimization of Electrical and Electronic Equipment (OPTIM 2012), 24-26 May 2012, Brasov, Romania [Conference Paper]
  20. 2011

  21. M. Enachescu, G.R. Voicu, S.D. Cotofana, Leakage-enhanced 3D-Stacked NEMFET-based Power Management Architecture for Autonomous Sensors Systems107_leakageenhanced_3dstacked_nemfetbased_power_management_ar.pdf (October 2011), 15th International Conference on System Theory, Control and Computing (ICSTCC 2011), 14-16 October 2011, Sinaia, Romania, Best Paper Award for PhD Students [Conference Paper]
  22. K.A. Gbolagade, G.R. Voicu, S.D. Cotofana, An Efficient FPGA Design of Residue-to-Binary Converter for the Moduli Set {2n+1,2n,2n-1}16_an_efficient_fpga_design_of_residuetobinary_converter_for_t.pdf (August 2011), IEEE Transactions On Very Large Scale Integration (VLSI) Systems (TVLSI) , volume 19, issue 8 [Journal Paper]
  23. G.R. Voicu, M. Enachescu, S.D. Cotofana, Towards "Zero-energy" using NEMFET-based Power Management for 3D Hybrid Stacked ICs56_towards_zeroenergy_using_nemfetbased_power_management_for.pdf (June 2011), IEEE/ACM International Symposium on Nanoscale Architectures (NANOARCH 2011), 8-9 June 2011, San Diego, USA [Conference Paper]
  24. 2010

  25. M. Enachescu, G.R. Voicu, S.D. Cotofana, Advanced NEMS-based Power Management for 3D Stacked Integrated Circuits243_advanced_nemsbased_power_management_for_3d_stacked_integrat.pdf (December 2010), International Conference on Energy Aware Computing (ICEAC 2010), 16-18 December 2010, Cairo, Egypt [Conference Paper]
  26. K.A. Gbolagade, G.R. Voicu, S.D. Cotofana, Memoryless RNS-to-Binary Converters for the moduli set {2n+1-1,2n,2n-1}166_memoryless_rnstobinary_converters_for_the_moduli_set_2n1.pdf (July 2010), 21st IEEE International Conference on Application Specific Systems Architectures, and Processors (ASAP 2010), 7-9 July 2010, Rennes, France [Conference Paper]
  27. K.A. Gbolagade, G.R. Voicu, S.D. Cotofana, An Efficient FPGA Design of Reverse Converter for the Moduli Set {2n+2,2n+1,2n}167_an_efficient_fpga_design_of_reverse_converter_for_the_moduli.pdf (July 2010), 6th International Summer School on Advanced Computer Architecture and Compilation for High-Performance and Embedded Systems (ACACES 2010), 11-17 July 2010, Terrassa, Spain [Conference Paper]