Quantum Computing

Moore’s law is pushing the technology to the scale where quantum phenomena, such as quantum tunnelling, can no longer be ignored. Where in conventional CMOS one tries to avoid unwanted quantum behaviour, quantum computing actually embraces these phenomena for computational purposes. The famous physicist Richard Feyman was the first to describe the idea of using superposition and entanglement as a way to model and simulate quantum phenomena.

Superposition refers to the fact that the unit of any arithmetic or logical operation is no longer a single bit but rather a superposition of bits, conveniently termed a qubit (quantum bit). Qubits however can be in any of the basis states,|0⟩ and |1⟩, or in a superposition of them. A qubit can thus be represented as a linear combination of |0⟩ and |1⟩: |ψ⟩ = a |0⟩ + b |1⟩ where a and b are the probability amplitudes (in general complex numbers); 

The second property is entanglement which means that two or more qubits can be combined in such a way that their individual states disappear and can no longer be separately observed or measured. The entanglement can be realised by applying at least a two-qubit gate operation such as a CNOT.  Through the entanglement of superposed states, it becomes evident where the exponential computing power of a quantum computer comes from: for n qubits, we have 2^n different states and any quantum gate (or circuit) operation performed on this expression, is performed in parallel on each term individually.

The CE lab is part of the Qutech Fault Tolerant roadmap. Intel has joined in September 2015 the research activities in this roadmap.(see below)

The Quantum Team

These are the people who are part of the Quantum Computer Architecture team.

The PI is Koen Bertels. He oversees all the research related to the definition of a scalable architecture for executing quantum circuits and to perform quantum error correction.  He collaborates with Richard Versluis from TNO

The people involved are:

  • Carmina Garcia Almudever: she is responsible for the research on the spatio-temporal decomposition of quantum circuits, assuming a large number of qubits in a tile-based architecture.
  • Nader Khammassi: he is responsible for the development of the quantum emulator and simulation that provides the experimental basis for the architectural implementation of the control logic.
  • Hans van Someren: he thinks about all compiler related issues both for programmability purposes as well as low level micro-code.
  • Imran Ashraf: he works with Hans and Nader on the compiler infrastructure needed for our research

The PhD students are:

  • Xiang Fu: he works on the control box for the transmon-based quantum processor developed by Leo DiCarlo. He investigates what a scalable architectural template could be when we reach larger number of qubits.
  • Savvas Varsamopoulos: he investigates the different decoding options there are when performing large scale quantum error correction. He investigates how to scale that to large number of qubits, through parallellisation or hardware acceleration.
  • LingLing Lao: she works with C. Garcia Almudever on the spatio-temporal decomposition of quantum circuits.
  • Dan Iorga: he also works on the definition of a template for a tile based quantum architecture with an emphasis on a specific set of quantum algorithms.

The MSc student involved in this research is :

  • Leon Riesebos: he works on the development of the quantum emulation platform.

If you are interested to join our team (as PhD student or post-doc) and you have a solid background in Physics and Electrical Engineering, Computer Engineering or Computer Science, contact Koen Bertels.

Intel starts collaboration with QuTech on Fault Tolerant Quantum Computing

Mike Mayberry and Jim Clarke with the QuTech Fault Tolerant QC team

Here is the press release published on businesswire from Intel announcing its investment in QuTech.

And  some links to news sites reporting on the Intel investment in QuTech:

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