Razvan Nane

PostDoc at the Computer Engineering Group of the Faculty of Engineering, Mathematics and Computer Science (EEMCS/EWI), Delft University of Technology.

Research Interests

  • High-Level Synthesis
  • High-Performance Computing
  • Compilation Techniques
  • Reconfigurable Computing
  • HW/SW co-design
  • Embedded Architectures
  • Computation-in-Memory Architectures

Projects

  • Current:
  1. High-Level Synthesis for Next-Generation High-Performance Processors
  • Past:
  1. Rendering FPGAs to Multi-Core Embedded Computing (REFLECT)
  2. Hardware Dependent Software for Systems on Chip (SoftSoc)
  3. Holistic Approach to Reconfigurable Real-Time Embedded Systems (hArtes)
  4. industrial Framework for Embedded Systems Tools (iFEST)
  5. Compilation and Simulation Techniques for Memristor-based Computation-in-Memory Architectures

Publications

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    2017

  1. J. Yu, R. Nane, I. Ashraf, M. Taouil, S. Hamdioui, H. Corporaal, K.L.M. Bertels, Skeleton-based Synthesis Flow for Computation-In-Memory Architectures (October 2017), IEEE Transactions on Emerging Topics in Computing, volume PP, issue 99, Pre-publish [Journal Paper]
  2. H.A. Du Nguyen, L. Xie, M. Taouil, R. Nane, S. Hamdioui, K.L.M. Bertels, On the Implementation of Computation-in-Memory Parallel Adder (May 2017), IEEE Transactions On Very Large Scale Integration (VLSI) Systems (TVLSI) [Journal Paper]
  3. J. Yu, T. Hogervorst, R. Nane, A Domain-Specific Language and Compiler for Computation-in-Memory Skeletons1609_a_domainspecific_language_and_compiler_for_computationin.pdf (May 2017), 27th ACM Great Lakes Symposium on VLSI (GLSVLSI 2017), 10-12 May 2017, Banff, Canada [Conference Paper]
  4. 2016

  5. R. Nane, V.M. Sima, C. Pilato, J. Choi, B Fort, A Canis, Y.T. Chen, H Hsiao, S Brown, F. Ferrandi, J Anderson, K.L.M. Bertels, A Survey and Evaluation of FPGA High-Level Synthesis Tools1524_a_survey_and_evaluation_of_fpga_highlevel_synthesis_tools.pdf (October 2016), IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD) , volume 35, issue 10 [Journal Paper]
  6. D. Iorga, R. Nane, Y. Lu, E van Dalen, K.L.M. Bertels, An Image Processing VLIW Architecture for Real-Time Depth Detection1555_an_image_processing_vliw_architecture_for_realtime_depth_d.pdf (October 2016), 28th International Conference on Computer Architecture and High Performance Computing (SBAC-PAD 2016), 26-28 October 2016, Los Angeles, USA [Conference Paper]
  7. M.A.B. Haron, J. Yu, R. Nane, M. Taouil, S. Hamdioui, K.L.M. Bertels, Parallel Matrix Multiplication on Memristor-Based Computation-in-Memory Architecture1550_parallel_matrix_multiplication_on_memristorbased_computati.pdf (July 2016), International Conference on High Performance Computing & Simulation (HPCS 2016), 18-22 July 2016, Innsbruck, Austria, Outstanding Paper Runner-up Award [Conference Paper]
  8. J. Yu, R. Nane, M.A.B. Haron, S. Hamdioui, H. Corporaal, K.L.M. Bertels, Skeleton-Based Design and Simulation Flow for Computation-In-Memory Architectures1544_skeletonbased_design_and_simulation_flow_for_computationi.pdf (July 2016), IEEE/ACM International Symposium on Nanoscale Architectures (NANOARCH 2016), 18-20 July 2016, Beijing, China, Best Student Paper Award [Conference Proceedings]
  9. 2015

  10. G. Nazarian, R. Nane, G.N. Gaydadjiev, Low-cost Software Control-Flow Error Recovery1496_lowcost_software_controlflow_error_recovery.pdf (August 2015), 18th Euromicro Conference on Digital Systems Design (DSD 2015), 26-28 August 2015, Funchal, Madeira (Portugal) [Conference Paper]
  11. H.A. Du Nguyen, L. Xie, R. Nane, M. Taouil, S. Hamdioui, K.L.M. Bertels, Computation-In-Memory Based Parallel Adder1497_computationinmemory_based_parallel_adder.pdf (July 2015), IEEE/ACM International Symposium on Nanoscale Architectures (NANOARCH 15), 8-10 July 2015, Boston, USA [Conference Paper]
  12. 2014

  13. R. Nane, V.M. Sima, C. Pham-Quoc, F Goncalves, K.L.M. Bertels, High-Level Synthesis in the Delft Workbench Hardware/Software Co-design Tool-Chain1439_highlevel_synthesis_in_the_delft_workbench_hardwaresoftwa.pdf (August 2014), 12th IEEE International Conference on Embedded and Ubiquitous Computing (EUC 2014), 26-28 August 2014, Milan, Italy [Conference Paper]
  14. R. Nane, Automatic Hardware Generation for Reconfigurable Architectures1430_automatic_hardware_generation_for_reconfigurable_architectu.pdf (April 2014), [Phd Thesis]
  15. 2013

  16. J.M.P. Cardoso, T. Carvalho, J G de F. Coutinho, R Nobre, R. Nane, P. Diniz, Z. Petrov, W. Luk, K.L.M. Bertels, Controlling a complete hardware synthesis toolchain with LARA aspects1394_controlling_a_complete_hardware_synthesis_toolchain_with_la.pdf (November 2013), Microprocessors and Microsystems (MICPRO) , volume 37, issue 8 [Journal Paper]
  17. R Nobre, J.M.P. Cardoso, B Olivier, R. Nane, L Fitzpatrick, J G de F. Coutinho, J. van Someren, V.M. Sima, K.L.M. Bertels, P. Diniz, Hardware/Software Compilation (August 2013), Chapter "Compilation and Synthesis for Embedded Reconfigurable Systems: An Aspect-Oriented Approach", Published by Springer [Book Chapter]
  18. R.J. Meeuws, S.A. Ostadzadeh, C. Galuzzi, V.M. Sima, R. Nane, K.L.M. Bertels, Quipu: A Statistical Modelling Approach for Predicting Hardware Resources1351_quipu_a_statistical_modelling_approach_for_predicting_hard.pdf (May 2013), ACM Transactions on Reconfigurable Technology and Systems (TRETS) , volume 6, issue 1 [Journal Paper]
  19. J G de F. Coutinho, J.M.P. Cardoso, T. Carvalho, R Nobre, S Bhattacharya, P. Diniz, L Fitzpatrick, R. Nane, Deriving resource efficient designs using the REFLECT aspect-oriented approach (extended abstract)1393_deriving_resource_efficient_designs_using_the_reflect_aspec.pdf (March 2013), 9th International Symposium on Applied Reconfigurable Computing (ARC 2013), 25-27 March 2013, Los Angeles, USA [Conference Paper]
  20. 2012

  21. R. Nane, V.M. Sima, K.L.M. Bertels, A Lightweight Speculative and Predicative Scheme for Hardware Execution1312_a_lightweight_speculative_and_predicative_scheme_for_hardwa.pdf (December 2012), International Conference on ReConFigurable Computing and FPGAs (ReConFig 2012), 5-7 December 2012, Cancun, Mexico [Conference Paper]
  22. R. Nane, V.M. Sima, K.L.M. Bertels, Area Constraint Propagation in High Level Synthesis601_area_constraint_propagation_in_high_level_synthesis.pdf (December 2012), International Conference on Field-Programmable Technology (FPT 2012), 10-12 December 2012, Seoul, Korea [Conference Paper]
  23. R. Nane, V.M. Sima, B Olivier, R.J. Meeuws, Y.D. Yankova, K.L.M. Bertels, DWARV 2.0: A CoSy-based C-to-VHDL Hardware Compiler600_dwarv_20_a_cosybased_ctovhdl_hardware_compiler.pdf (August 2012), 22nd International Conference on Field Programmable Logic and Applications (FPL 2012), 29-31 August 2012, Oslo, Norway [Conference Paper]
  24. 2011

  25. R. Nane, S. van Haastregt, T.P. Stefanov, B. Kienhuis, V.M. Sima, K.L.M. Bertels, IP-XACT Extensions for Reconfigurable Computing8_ipxact_extensions_for_reconfigurable_computing.pdf (September 2011), 22nd IEEE International Conference on Application-specific Systems, Architectures and Processors (ASAP 2011), 11-14 September 2011, Santa Monica, USA [Conference Paper]
  26. J.M.P. Cardoso, K.L.M. Bertels, G.K. Kuzmanov, R. Nane, V.M. Sima, REFLECT: Rendering FPGAs to Multi-core Embedded Computing (August 2011), Chapter "Reconfigurable Computing - From FPGAs to Hardware/Software Codesign", Published by Springer [Book Chapter]
  27. J.M.P. Cardoso, R. Nane, P. Diniz, Z. Petrov, K Kratky, K.L.M. Bertels, M Hubner, F Goncalves, G. Coutinho, G Constantinides, B Olivier, W. Luk, J.A. Becker, G.K. Kuzmanov, A New Approach to Control and Guide the Mapping of Computations to FPGAs602_a_new_approach_to_control_and_guide_the_mapping_of_computati.pdf (July 2011), International Conference on Engineering of Reconfigurable Systems and Algorithms (ERSA'11), 18-21 July 2011, Las Vegas, USA [Conference Paper]
  28. R. Nane, V.M. Sima, J. van Someren, K.L.M. Bertels, DWARV: A HDL Compiler with Support for Scheduling Custom IP Blocks737_dwarv_a_hdl_compiler_with_support_for_scheduling_custom_ip.pdf (June 2011), 48th Design Automation Conference (DAC 2011), 5-10 June 2011, San Diego, USA, WIP poster session [Conference Paper]
  29. R. Nane, S. van Haastregt, T.P. Stefanov, B. Kienhuis, K.L.M. Bertels, An HdS Meta-Model Case Study: Integrating Orthogonal Computation Models734_an_hds_metamodel_case_study_integrating_orthogonal_computa.pdf (March 2011), Workshop DATE 2011 : Hardware Dependent Software (HdS) Solutions for SoC Design (DATE 2011 Workshop), 18 March 2011, Grenoble, France [Conference Paper]
  30. 2010

  31. R. Nane, K.L.M. Bertels, A Composable and Integrable Hardware Compiler for Automated Heterogeneous HW/SW co-design Tool-Chains730_a_composable_and_integrable_hardware_compiler_for_automated.pdf (July 2010), 6th International Summer School on Advanced Computer Architecture and Compilation for High-Performance and Embedded Systems (ACACES 2010), 11-17 July 2010, Terrassa, Spain [Conference Paper]
  32. 2009

  33. S. van Haastregt, R. Nane, B. Kienhuis, HdS Generation (October 2009), SS Workshop in Embedded Systems Week (ESWeek 2009 Workshop), 16 October 2009, Grenoble, France [Conference Paper]
  34. 2008

  35. R. Nane, K.L.M. Bertels, Scheduling in the Context of Automatic Hardware Generation727_scheduling_in_the_context_of_automatic_hardware_generation.pdf (September 2008), 8th Architectures and Compilers for Embedded Systems Symposium (ACES 2008), 17-18 September 2008, Edegem, Belgium [Conference Paper]
  36. 2007

  37. R. Nane, An Agent Adaptability Framework (September 2007), [Msc Thesis]
Razvan Nane