Quantum Engineering Colloquium


1. Fabio Sebastiano, TU Delft, The Netherlands -- 02-05-2018

2. Pascal ‘t Hart, TU Delft, The Netherlands -- 02-05-2018

3. Job van Staveren, TU Delft, The Netherlands -- 02-05-2018 


 1.   Cryogenic CMOs for Scalable Quantum Computing

Quantum computers hold the promise to change our everyday lives in this century in the same radical way as the classical computer did in the last century, by efficiently solving problems that are intractable today, such as large number factorization and simulation of quantum systems. Quantum processors must be cooled at cryogenic temperatures well below 1 K and each of their quantum bits (qubit) must be controlled by a classical electronic interface. Since future quantum processors with practical applications will require up to thousands or millions of quantum bits (qubit), the electronic controller must operate at cryogenic temperatures as close as possible to the quantum processor, to avoid the unpractical requirement of thousands of cables from the cryogenic refrigerator to a room-temperature controller. This talk will address how standard CMOS technology can be used to build such cryogenic electronic controller. A brief introduction to quantum computers and their operation will be given, followed by a description of their hardware implementation and their requirements in terms of electronic control and read-out. We will address the challenges of building a scalable silicon-based cryogenic electronic controller, focusing on to use standard CMOS technology to build complex analog, mixed-signal and digital systems and circuits operating down to 4 K and below.

2. Cryogenic MOSFET modeling

In order to build a scalable quantum computer, a cryogenic CMOS controller has the potential to solve the interface problem between qubits cooled to cryogenic temperatures and the classical control electronics located at room temperature. During the design of this controller, device models valid at these low temperatures are required to make design choices and validate circuits. Device mismatch is a core part of these models. However, not much data is available at cryogenic temperatures. In this talk, basics about mismatch are introduced, the cryogenic measurement setup is described and finally results on MOSFET mismatch at cryogenic temperatures are presented.

3. A wide temperature range voltage reference

In view of the scalability of the quantum processor, interface electronics to the qubits are placed at the 4 K stage. Part of these electronics consists of e.g. ADC's, DAC's and LDO's which all require a voltage reference. Therefore a voltage reference is required that can also work at 4 K. Due to increased non-linearity and limited headroom, the traditional BJT-based voltage references cannot be used at these low temperatures. Measurements show that MOS devices suffer much less from these effects. Therefore a voltage reference is implemented with MOS devices, targeting a temperature range from 4 K up to 400 K.


Fabio Sebastiano holds degrees from University of Pisa, Italy (B.Sc., M.Sc.), from Sant'Anna School of Advanced Studies, Pisa, Italy (M.Sc.) and from Delft University of Technology, The Netherlands (Ph.D.). From 2006 to 2013, he was with NXP Semiconductors Research in Eindhoven, The Netherlands, where he conducted research on fully integrated CMOS frequency references, nanometer temperature sensors and area-efficient interfaces for magnetic sensors. In 2013, he joined Delft University of Technology, where he is currently an Assistant Professor. He has authored or co-authored one book, ten patents, and over 50 technical publications. His main research interests are cryogenic electronics for quantum applications, quantum computing, sensor read-outs and fully-integrated frequency references. Dr. Sebastiano was the co-recipient of the best student paper award at ISCAS in 2008, the best paper award at IWASI in 2017 and the best IP award at DATE in 2018. He is a Distinguished Lecturer of the Solid-State Circuit Society.

Pascal 't Hart received his MSc degree from the Delft University of Technology in 2014. The thesis topic was characterization of the piezo-junction effect in an industrial 130nm process. He started his PhD in 2017 with the AQUA group at the Delft University of Technology, where he works on cryogenic MOSFET models used for design of qubit interface electronics. His research interests are: device modeling, in particular device mismatch and cryogenics.

Job van Staveren received the BSc degree from Delft University of Technology in 2016. Currently, he is working on his MSc thesis project in the Applied Quantum Architectures group. The focus of the project is the design of a voltage reference for quantum computing applications.


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