Building Zynq Accelerators with Vivado High Level Synthesis


Steve Neuendorffer, Xilinx, USA  -- 16-12-2013


This talk will focus on the practical application of HLS in the context of the Zynq architecture, which contains a complete ARM subsystem integrated with FPGA logic in a single integrated device.  This combination enables designers to quickly build high-performance, low power embedded processing systems with architectures customized for a particular. The talk will include an introduction to Zynq, Vivado HLS, and show a number of accelerated applications.


Stephen completed the PhD at UC Berkeley in the Ptolemy Research Group Prior to moving to the HLS product group, he spent 8 years working in the Xilinx Research Labs.



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