Joost Hoozemans

PhD student at the Computer Engineering Group of the Faculty of Engineering, Mathematics and Computer Science (EEMCS/EWI), Delft University of Technology.

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Through the ALMARVI European research project ( ), I am working on the rVEX reconfigurable VLIW softcore:

The rVEX is one of the ALMARVI execution platforms, representing multiple points in a spectrum of highly flexible general-purpose processors (by means of its dynamic run-time adaptability), and highly optimized platforms for specific applications (by means of its design-time reconfigurability). For example, we have developed an FPGA overlay fabric that targets streaming image processing workloads.

For the run-time adaptible processor, I am working on ILP-driven configuration scheduling techniques. The final goal of the rVEX platform is to continuously optimize its hardware configuration to the running tasks. I am working on different approaches of using ILP information to guide these reconfigurations. The ILP information can be acquired by using run-time profiling (performance monitoring) or by analyzing code and annotating binaries during compilation.

The rVEX does not just consist of a processor prototype; it is a complete platform with compilers, a complete toolchain including binutils and runtime libraries, a fast architectural simulator, ucLinux (nommu) support, debugging hardware and tools, several example and test programs and of course the VHDL code of the processor.

It is available for researchers and enthusiasts that are interested in VLIW architecture under an academic license. The platform has matured considerably over the last few years and I believe it is the best opensource VLIW platform available and provides a running start in this field.

The rVEX is a team effort, where some examples of my contributions are:
-Porting the 2.0 nommu Linux kernel from uCLinux (my MSc graduation work) and adding support for Position-Independent Code to our toolchain through the Flat binary format
-Porting the Open64 compiler and a number of runtime libraries from STMicroelectronics' st200/Lx architecture to VEX
-Porting newlib (a simple C standard library)
-Heavily modifying the st200 architectural simulator and implementing all dynamic capabilities, control registers and other characteristics into what is now called simrvex


I have been involved in teaching the following courses:

- Reconfigurable Computing Design (ET4370) 2013
- Reconfigurable Computing Design (ET4370) 2015
- Computer Architecture: Special Topics (ET4078) 2013
- Computer Architecture: Special Topics (ET4078) 2014
- ET8030 (Operating Systems Project - individual students)
- Modern/Embedded Computer Architectures (MCA/ECA: ET4074/IN4340) 2014
- Modern/Embedded Computer Architectures (MCA/ECA: ET4074/IN4340) 2015
- Modern Computer Architectures (MCA: ET4074) 2016
- ASCI Spring School 2017 Design-Space Exploration Lab exercise
- Modern Computer Architectures (MCA: ET4074) 2017

Additionally, I have had the pleasure of working with these students for their MSc theses;
- Muez  Reda (Intel)
- Klaas  Meun (Royal Dutch Navy)
- Jens  Johansen (SRON)
- Rolf  Heij (Alten)
- Koray  Yanik (Maxeler)
- Muneeb  Yousaf(returned to Pakistan as per his exchange funding program)
- Hugo  van der Wijst (Tesla)
- Jeroen  van Straten (Now my colleague at TUD)
- Panagiotis (Panos) Mitsis (ASML)

Lastly, I have aided these BSc students in their rVEX-related honours track project:
- Tom aan de Wiel
- Piet de Vaere
- Matti Dreef
- Luc Enthoven


I have been responsible for the local arrangements as finance chair of the 13th International Symposium on Applied Reconfigurable Computing (ARC 2017) Delft.

Additionally, I am chairing the MSc/postgrad student association "Micro-Electronic Systems and Technology (MEST)"



Publications Joost Hoozemans

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  1. J.J. Hoozemans, J. van Straten, Z. Al-Ars, S. Wong, Evaluating Auto-adaptation Methods for Fine-Grained Adaptable Processors1702_evaluating_autoadaptation_methods_for_finegrained_adaptab.pdf (April 2018), 31st International Conference on Architecture of Computing Systems (ARCS2018), 9-12 April 2018, Braunschweig, Germany [Conference Paper]
  2. 2017

  3. A. L. Sartor, P. H. E. Becker, J.J. Hoozemans, S. Wong, A.C.S. Beck, Dynamic Trade-off among Fault Tolerance, Energy Consumption, and Performance on a Multiple-issue VLIW Processor1650_dynamic_tradeoff_among_fault_tolerance_energy_consumption.pdf (October 2017), IEEE Transactions on Multi-Scale Computing Systems (TMSCS) , volume PP, issue 99 [Journal Paper]
  4. J.J. Hoozemans, J. van Straten, S. Wong, Using a Polymorphic VLIW Processor to Improve Schedulability and Performance for Mixed-criticality Systems1629_using_a_polymorphic_vliw_processor_to_improve_schedulabilit.pdf (August 2017), 23rd IEEE International Conference on Embedded and Real-Time Computing Systems and Applications (RTCSA 2017), 16-18 August 2017, Hsinchu, Taiwan [Conference Paper]
  5. A.A.C. Brandon, J.J. Hoozemans, J. van Straten, S. Wong, Exploring ILP and TLP on a Polymorphic VLIW Processor1603_exploring_ilp_and_tlp_on_a_polymorphic_vliw_processor.pdf (April 2017), 30th International Conference on Architecture of Computing Systems (ARCS2017), 3-6 April 2017, Vienna, Austria [Conference Paper]
  6. J.J. Hoozemans, R.W. Heij, J. van Straten, Z. Al-Ars, VLIW-based FPGA computational fabric with streaming memory hierarchy for medical imaging applications1602_vliwbased_fpga_computational_fabric_with_streaming_memory.pdf (April 2017), 13th International Symposium on Applied Reconfigurable Computing (ARC2017), 3-7 April 2017, Delft, The Netherlands [Conference Paper]
  7. J.J. Hoozemans, A. F Lorenzon, A.C.S. Beck, S. Wong, Improved dynamic cache sharing for communicating threads on a runtime-adaptable processor1601_improved_dynamic_cache_sharing_for_communicating_threads_on.pdf (January 2017), 11th HiPEAC Workshop on Reconfigurable Computing (WRC2017), 23-1-2017, Stockholm, Sweden [Conference Paper]
  8. 2015

  9. A.A.C. Brandon, J.J. Hoozemans, J. van Straten, A. F Lorenzon, A. L. Sartor, A.C.S. Beck, S. Wong, A Sparse VLIW Instruction Encoding Scheme Compatible with Generic Binaries1518_a_sparse_vliw_instruction_encoding_scheme_compatible_with_g.pdf (December 2015), 2015 International Conference on ReConFigurable Computing and FPGAs (ReConFig 2015), 7-9 December 2015, Mayan Riviera, Mexico [Conference Paper]
  10. J.J. Hoozemans, J. Johansen, J. van Straten, A.A.C. Brandon, S. Wong, Multiple Contexts in a Multi-ported VLIW Register File Implementation1517_multiple_contexts_in_a_multiported_vliw_register_file_impl.pdf (December 2015), 2015 International Conference on ReConFigurable Computing and FPGAs (ReConFig 2015), 7-9 December 2015, Mayan Riviera, Mexico [Conference Paper]
  11. J.J. Hoozemans, S. Wong, Z. Al-Ars, Using VLIW Softcore Processors for Image Processing Applications1506_using_vliw_softcore_processors_for_image_processing_applica.pdf (July 2015), International Conference On Embedded Computer Systems: Architectures, Modeling, And Simulation (SAMOS XV (2015)), 20-23 July 2015, Samos, Greece [Conference Paper]
  12. 2014

  13. J.J. Hoozemans, Porting Linux to the rVEX reconfigurable VLIW softcore1460_porting_linux_to_the_rvex_reconfigurable_vliw_softcore.pdf (January 2014), [Msc Thesis]
Joost Hoozemans