List of some ongoing projects:

  • CHIRON (EU project/ FETOPEN)
    • Purpose: CHIRON targets a ground-breaking proof of principle of the essential elements for hybrid spin wave–CMOS computing. CHIRON will fabricate basic logic gates, such as inverters and majority gates, demonstrate their operation, and assess their performance. CHIRON will also develop magnetoelectric and multiferroic nanoresonators, based on nanoscale bulk acoustic resonators, which bear promise for high energy efficiency and large output signal. 
    • Collaborators: IMEC (BE), CNRS (FR), FORTH (GR), Thales (FR), UNIKL (DE), UPSud (FR), Solmates (NL), IMT (RO).

  • MNEMOSENE (EU project/ ICT 2017)
    • Purpose: Purpose: The project aims at demonstrating a new computation-in-memory (CIM) architecture based on resistive devices together with its required programming flow and interface. The targets are: (a) Design of new (Non-Von Neumann) CIM architecture based on a memristive device technology, (b) Design and test of memristor based logic and memories, (c) design of efficient on-chip communication schemes for computation in memory architecture, (d) Development and design of new mapping method and framework for efficient compilation and mapping of parallel algorithms on CIM architecture.
    • Collaborators: Eindhoven University of Technology, IMEC, ARM, IBM, RWTH-Aachen, ETHZ, INRIA.
  • RESCUE (EU project/ MSCA-ITN 2017)
    • Purpose: Enhance design of complex systems at the next generation nanoelectronics technologies by addressing the demanding and mutually dependent aspects of reliability, security and quality, as well as corresponding electronic design automation tools.
    • Collaborators: Intrinsic Tallinn University of Technology, EE; BTU Cottbus-Senftenberg, DE; Politecnico di Torino, IT; Cadence Design Systems GmbH, DE; IROC Technologies, FR; Intrinsic-ID B.V., NL; IHP GmbH, DE.
  • TRACE (EU Project/ CATRENE 2016)
    • Purpose: The project aims at developing a method including processes and tools required for the upgrade and qualified transfer of standard consumer electronic (CE) semiconductor components and technologies to the automotive domain. The method will be generally applicable to identify required modifications and adaptations as well as final conditions for qualification of CE components, technologies and resultant integrated systems for functionally safe and reliable automotive applications.
    • Collaborators/ Partners: NXP(NL), Heliox (NL), Catena (NL), UNi of Siegen (DE), Bosch (DE), BMW (DE), Volkswagen (DE), ST (FR), etc.
  • REMAP (National peroject with ESA- 2016)
    • Purpose: The project aims at understating, characterizing and modelling different emerging reliability failure mechanisms, which are rising and becoming dominant with new generations of advanced DRAM technology nodes used in aerospace. In particular, the objectie are: a) Intensive characterization of different reliability failure mechanisms (including the emerging ones) on the reliability aspects; i.e., failure rates and life time for DRAM memories, b) Exploring the impact of other aspects such as technology scaling, temperature, process variations, Vdd variations, workload/application, etc., c) Development of accurate failure rate prediction models, d) Validation of the models using both simulation and experiments (measurements).
    • Collaborators: Euorpean Space Agencey (NL).
  • TUTORIAL (EU project/ H2020-TWINN- 2015)
    • Purpose: boost the scientific excellence and innovation capacity in the trans-disciplinary field of nanoelectronics based dependable cyber-physical systems (NBDCPS) of Tallinn University of Technology (TUT) and its high-quality Twinning partners.
    • Collaborators/partners: Tallinn University of Technology (TUT), Politecnico di Torino (POLITO) and Deutsches Zentrum für Luft- und Raumfahrt (DLR).
Said Hamdioui