Quantum Engineering Colloquium


1. Daniel Kraak, TU Delft, The Netherlands -- 06-06-2018

2.  Gerd Kiene, TU Delft, The Netherlands -- 06-06-2018


 1.   Degradation Analysis of High Performance Industrial 14nm FinFET SRAMs

Memory designs add design margins to compensate for chip aging. However, this may lead to yield loss (in case of overestimation) or low reliability (in case of underestimation). This work analyzes the impact of aging on a complete high performance 14nm FinFET SRAM using a calibrated aging model. It investigates both the impact on the memory’s parametric degradation (i.e., its delay) and its functional degradation (i.e., correct functionality). During this analysis, it is examined which components are the main contributors to the degradation of the memory’s reliability. Moreover, it is investigated how the memory’s reliability is impacted by temperature and voltage fluctuations. The results show that the timing circuit, address decoder, and the output latches and buffers are the main contributors to the parametric degradation of the memory. On the other hand, the cell, sense amplifier, and address decoder are the main contributors to the memory’s functional degradation.

2.  Neuromorphic Hardware

The talk will be about neuromorphic hardware - both conceptually motivating the idea as well as presenting an example implementation: the BrainScales System.


Daniel Kraak received the bachelor’s degree in electrical engineering in 2013 and the master’s degree in computer engineering in 2016 from TU Delft. Currently, he is pursuing a Ph.D. degree at TU Delft at the Computer Engineering Laboratory. His research focuses on robust memory design and mitigation for aging.

Gerd studied Physics in Heidelberg and Cornell, he is quite fond of boardgames and will be working as a PhD student of Fabio on Qubit readout circuits in CMOS.


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