Cyber-Physical Systems (CPS) - Heterogenous Multi-Core E/E-Architectures for safety-critical Technologies -

Speaker

Professor Dr.-Ing. Dr. h. c. Jürgen Becker, Institute for Information Processing Technologies (ITIV), Karlsruhe Institute of Technology (KIT), Germany -- 14-04-2015

Abstract

The field of embedded electronic systems, nowadays also called cyper-physical systems, is still emerging. A cyber-physical system (CPS) is a system featuring a tight combination of, and coordination between, the system’s computational and physical elements. Today, a pre-cursor generation of cyber-physical systems can be found in areas as diverse as aerospace, automotive, chemical processes, civil infrastructure, energy, healthcare, manufacturing, transportation, entertainment, and consumer appliances. This generation is often referred to as embedded systems. In embedded systems the emphasis tends to be more on the computational elements, and less on an intense link between the computational and physical elements.
Multipurpose adaptivity and reliability features are playing more and more of a central role, especially while scaling silicon technologies down according to Moore´s benchmarks. Leading processor and mainframe companies are gaining more awareness of reconfigurable computing technologies due to increasing energy and cost constraints. My view is of an “all-win-symbiosis” of future silicon-based processor technologies and reconfigurable circuits/architectures. Dynamic and partial reconfiguration has progressed from academic labs to industry research and development groups, providing high adaptivity for a range of applications and situations. Reliability, failure-redundancy and run-time adaptivity using real-time hardware reconfiguration are important aspects for current and future embedded systems, e.g. for smart mobility in automotive, avionics, railway, etc. systems. Thus, scalability for corresponding E/E-Architectures, as we have experienced for the last 35 years is at its end as we enter new phases of technology constraints and certification conditions within safety-critical application domains. Beyond the capabilities of traditional reconfigurable fabrics (like FPGAs), the so-called Multi-/Many-Core solutions are actually fixed confirmed on the future semiconductor roadmaps. This requires urgently new solutions for programming and integrating such kind of parallel and heterogenous architectures and platforms, e.g. especially in safety-critical application domains like automotive, avionics and railway. 
The keynote will finally discuss in detail the corresponding challenges and specifically outline the promising perspectives for future multi-/many-core as well as dynamically reconfigurable, complex, adaptive and reliable systems-on-chip, for embedded and especially smart mobility computing systems.

Bio

Jürgen Becker received the Diploma and Ph.D. (Dr.-Ing.) degree from Technical University Kaiserslautern, Germany. He is a full professor for embedded electronic systems and Head of the Institute for Information Processing Technologies (ITIV) at the Karlsruhe Institute of Technology (KIT).
From 2005-2009 he has been appointed as Vice President for Education at Universitaet Karlsruhe (TH) and Chief Higher Education Officer (CHEO) at KIT from 2009-2012.Since 2012 till 2014 he served as Secretary General of CLUSTER, an association of 12 leading technical universities in Europe. In 2013 Prof. Becker received the Honorary Doctor award (Dr. h.c.) from Technical University Budapest (Hungary). 
His research interests include Hardware/Software Systems-on-Chip (SoC), Cyber-Physical Systems (CPS), Heterogenous Multicore (MC) Architectures, Reconfigurable Computing, Fast Data Acquisition, Filtering and Storage for Semiconductor Detectors. He authored more than 400 papers in international journals and conferences. He is a Senior Member of the IEEE, Gesellschaft für Informatik e.V. (GI) and ITG/VDE.

Slides

Will be available soon

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